xmachine log
2025-11-21: Current State
The last two months have mostly been spent writing libunibus. That's
the Unibus driver and receiver stuff for devices. Bus communication
is written Rube Goldberg-style with each device having a priority bus and data
bus UNIX file socket.
Why? Well, it probably could have been done another way (and better),
but it seemed the easiest way to go for implementing the priority bus
at least to me. Devices, once they request bus master access, can block
(accept) or pass the grant from the bus arbitrator. That's how I ended up with
the implementation I have.
It kind of looks like this:
Each circle is a device (standalone program) and it has a UNIX file socket,
supporting datagrams, named /tmp/xmachine/<name>_pr.socket.
For example, the CPU needs bus master access to fetch a word from memory. To do that, you'd see the following activity on the priority bus:
CPU: Assert BR BA: Receive BR, Assert BG CPU: Receive and block BG, Assert SACK BA: Receive SACK, Negate BG CPU: Receive negated BG, Assert BBSY to the left (BA) and right (MEM) CPU now has control of the data bus.